1. Field of the Invention
The present invention relates to microelectronic devices and methods for fabricating the same, and more particularly, to dielectric multilayer structures and methods for fabricating the same.
2. Description of the Related Art
Through the evolution of integrated circuit (IC) technology, sizes of microelectronic devices have become smaller, providing high integration density and high performance. Particularly, a gate dielectric layer is formed to be as thin as possible. This is because the thinner the thickness of the gate dielectric layer, the larger a driving current of a microelectronic device such as a MOS transistor. Thus, it becomes increasingly important to form a reliable gate dielectric layer, one that is extremely thin and has minimum defects, in order to improve the performance of microelectronic devices.
A thermal oxide layer, that is, a silicon oxide layer, has been used as the gate dielectric layer for several decades. This is because the silicon thermal oxide layer is stable with respect to the underlying silicon substrate, and a method for its fabrication is relatively simple.
However, since the silicon oxide layer has a low dielectric constant of about 3.9, reduction of the thickness of the gate dielectric layer made of the silicon oxide layer is limited. Also, it is difficult to reduce the thickness of the silicon oxide layer owing to a gate leakage current flowing through the gate dielectric layer made of the thin silicon oxide layer.
Accordingly, there has been increasing demand for a substitute dielectric layer, such as a metal oxide layer, which may be thicker than the silicon oxide layer, but can still improve the performance of a device, e.g., a high current drivability. The performance of the substitute dielectric layer can be evaluated and expressed by an equivalent oxide thickness (EOT).
Although a metal oxide layer has a greater thickness than that of the silicon oxide layer, the metal oxide layer can reduce the leakage current without adversely affecting the performance of the devices. Moreover, if the gate dielectric layer is thick, an etching margin of the gate dielectric layer can be increased while forming a gate electrode. The increase of the etching margin prevents the silicon substrate from being inadvertently exposed during an etching process for forming the gate electrode. For this reason, metal oxides of high dielectric constants have been suggested as an alternative for the dielectric material that forms the gate dielectric layer or that forms a capacitor dielectric layer. Since a dielectric constant of the metal oxide layer is higher than that of the silicon oxide layer, the metal oxide layer, which has an EOT equal to the silicon oxide layer while being physically thicker than the silicon oxide layer, can be used as the gate dielectric layer of a semiconductor device or as the capacitor dielectric layer. However, metal oxides such as BST, TiO2, and Ta2O5 have several problems when a conventional substrate, e.g., the silicon substrate, is used. For example, the metal oxides such as BST, TiO2, and Ta2O5 easily react with the silicon substrate, degrading the interface characteristic between the silicon substrate and the metal oxide layer. In particular, the leakage current is increased, an interface trap density is increased, and channel mobilities of carriers are decreased. As a result, the rate at which the current of a MOS transistor turns on or off is decreased so that the switching characteristic of the MOS transistor is significantly reduced.
On the other hand, an Aluminum oxide layer, a single metal oxide layer, is known to have excellent thermal stability. However, the Aluminum oxide layer cannot be used by itself because it has a low dielectric constant, i.e., about 9, and it is quite difficult to control a threshold voltage due to a negative fixed charge therein.
In contrast, a hafnium oxide (HfO2) layer and a zirconium oxide (ZrO2) layer, which also are single metal oxide layers, have a high dielectric constant of 20 or more and it is easy to fabricate them. However, the single metal oxide layers have a relatively low crystallization temperature and are thermally unstable. Thus, the single metal oxide layers can be easily crystallized if a subsequent thermal annealing process for activating impurities injected into a source/drain region is performed. Therefore, crystal grain boundaries are formed within the single metal oxide layers, resulting in current leakage.
A metal oxide layer of different elements, for example, a hafnium aluminum oxide (HfAlOx) layer, which has been studied as an alternative for the metal oxide layer of the single metal oxide layer, has a relatively excellent leakage current characteristic and a low threshold voltage characteristic, thereby enabling stable fabrication of the HfAlOx layer. However, a mobility characteristic of the HfAlOx layer is low and the rate at which the current of a MOS transistor, for example, a pMOSFET, turns on or off (“switch characteristic”) is reduced by the low mobility characteristic.
A hafnium silicate layer or a zirconium silicate layer, which are metal oxide layers of different elements, is formed on a silicon substrate in a chemically stable state so that an unnecessary interface layer that will increase the EOT as in the case of a silicon oxide layer is not formed. However, unfortunately, a threshold voltage of a MOS transistor, for example, a pMOSFET, is very large and it also is not easy to fabricate a pMOSFET. Further, the metal oxide layer of different elements has a dielectric constant of about 10-12 so that the amount that the dielectric constant of the pMOSFET may be increased is limited. Embodiments of the invention address these and other disadvantages of the conventional art.